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Vertically Stacked 2D Nanosheet FETs: The Future of Nanoelectronics?

As Moore’s Law approaches fundamental limits, researchers are exploring new materials and device architectures to push semiconductor technology beyond traditional silicon-based FinFETs. One promising alternative is the gate-all-around (GAA) 2D nanosheet field-effect transistor (NSFET), which offers superior electrostatic control and scalability.

In our recent study 10.1109/TED.2025.3533474 , we present a comprehensive simulation of vertically stacked 2D nanosheet FETs, evaluating their potential to replace FinFETs in future nanometer-scale technology nodes. The study investigates device performance, nonidealities, and circuit-level impact, providing valuable insights into the future of transistor design.

Why 2D Materials for Nanosheet FETs?

Traditional silicon-based transistors face significant short-channel effects (SCEs) and mobility degradation as they scale down. 2D materials (2DMs) such as MoS₂ offer a compelling alternative due to:

✔ Atomic thinness – Enables extreme scaling while maintaining excellent gate control.
✔ Superior electrostatics – Reduces leakage currents and enhances device reliability.
✔ Improved mobility – Unlike silicon nanosheets, 2DMs do not suffer from quantum confinement effects.
✔ Stackability – Vertical stacking allows for increased transistor density without increasing the footprint.

Key Findings from the Study

The study explores three different device structures:

1️⃣ Double-Gate FET (DG-FET) – Traditional planar structure with a monolayer MoS₂ channel.
2️⃣ Gate-All-Around (GAA) Vertically Stacked FET – Multi-layer MoS₂ nanosheets with individual surrounding gates.
3️⃣ Gate-Around-Perimeter (GAP) FET – Stacked nanosheets with a single gate around the perimeter (but no gates between layers).

Findings:
✔ GAA-FET demonstrated the highest ON-current (I_ON) due to superior electrostatic control.
✔ GAP-FET offered a compromise between complexity and performance but had weaker gate control.
✔ The vertically stacked GAA-FET showed nearly 3× higher I_ON compared to a monolayer DG-FET.

Influence of Device Parameters on Performance

✔ Spacer Length & Doping: Increasing spacer length (i.e., the gap between source/drain and gate) reduces I_ON. However, doping the spacer region mitigates this issue and improves charge transport.
✔ Contact Resistance (R_SD): High resistance at metal-semiconductor contacts significantly degrades I_ON. The study confirms that stacking multiple MoS₂ layers reduces the impact of contact resistance, making GAA-FETs more viable.
✔ Line-Edge Roughness (LER): Surface imperfections in 2D materials impact transistor performance. The study finds that LER reduces I_ON, but vertical stacking minimizes its negative effects.

Circuit-Level Impact: 32-bit Full Adder Simulation

Beyond individual device performance, the study evaluates circuit-level impact by simulating a 32-bit full adder using the GAA-FET model.

Findings:
✔ The GAA-FET design outperforms traditional CMOS in energy-delay tradeoffs, making it ideal for high-performance computing.
✔ Despite the impact of contact resistance, the 3-layer GAA-FET still meets IRDS requirements for 1-nm technology nodes.

Why This Research Matters

🔹 Breakthrough in Nanoelectronics: Stacked 2D nanosheet FETs provide a path forward for sub-5nm technology nodes, enabling continued miniaturization.
🔹 Better AI & HPC Performance: GAA-FETs offer low-power, high-speed solutions crucial for AI accelerators and high-performance computing.
🔹 Overcoming Silicon’s Limitations: 2D materials do not suffer from mobility degradation and provide superior electrostatic control compared to silicon nanosheets.

Conclusion

This study confirms that vertically stacked 2D nanosheet FETs are a viable alternative to FinFETs and could define the next generation of nanoelectronics. While challenges such as contact resistance and fabrication complexityremain, the superior scalability, electrostatic control, and circuit performance of GAA-FETs make them a promising technology for the post-silicon era.